1. Field
The subject matter discloses herein relates to devices and methods of processing data received from a transmission medium. In particular, the subject matter disclosed herein relates to processing signals received from a communication channel in the presence of noise and distortion.
2. Information
To recover information from a signal received from noisy communication channel with distortion, receivers typically employ filtering and equalization techniques to enable reliable detection of the information. Decreases in the cost of digital circuitry have enabled the cost effective use of adaptive digital filtering and equalization techniques that can optimally “tune” a filter according to the specific characteristics of a noisy communication channel.
FIG. 1 shows a conventional digital filter 10 employing a finite impulse response (FIR) configuration. An analog input signal 12 is received at an analog to digital converter (ADC) 14 to provide a digital signal at discrete sample intervals. The analog input signal 12 may be transmitting encoded symbols representing information in a noisy communication channel. The ADC 14 may sample the analog input signal 12 at discrete sample intervals corresponding with an inter-symbol temporally spacing or fractions thereof. In the illustrated example, the ADC 14 samples the analog input signal 12 at half the temporal spacing between consecutive symbols (i.e., T/2 where “T” represents a symbol interval) in the analog input signal 12. On each discrete sample interval, the digital signal from the present discrete sample interval is provided to a multiplication circuit 20 to be scaled by coefficient c0, and signal taps from previous discrete sample intervals (i.e., digital samples delayed by delay circuits 16) are provided to multiplication circuits 20 to be scaled by coefficients c1 through c4, respectively. The outputs of the three multiplication circuits are then additively combined at a summing circuit 22 as an equalized output signal.
The coefficients c0 through c4 are typically updated to approximate a least mean square error (LMS) filter for the particular FIR filter configuration. A limiting circuit 30 may provide a bi-level detection of symbols from the filtered output the summing circuit 22 and differencing circuit 28 provides a difference between the filtered output and the detected symbol as an “error.” A limiting circuit 26 provides a sign of the error to each of multiplication circuit 25 for updating the coefficients c0 through c4. Each of the multiplication circuits 25 multiplies the sign of the error with the sign of a corresponding temporal version of the digital signal (as detected at a limiting circuit 18) and a sample and hold circuit 24 generates an updated coefficient.
Each of the coefficients c0 through c4 is typically updated on the discrete sample intervals. Accordingly, for a discrete sample intervals at fractions of a symbol interval, the c0 through c4 are typically updated on the fractions of the symbol interval. Such updates on the fractional symbol interval typically require costly charge pump circuitry at the sample and hold circuits 24 for updating the coefficients c0 through c4.